Cadence Design Systems Sigrity 2018.04 x64  集成3D設計與分析，大幅縮短PCB設計週期
全新3DWorkbench解決方案橋接PCB設計與分析，實現PCB設計成本與性能的大幅優化

楷登電子(美國Cadence公司，NASDAQ:CDNS)今日宣佈發佈Cadence®Sigrity™2018版本，該版本包含最新的3D解決方案，幫助PCB設計團隊縮短設計週期的同時實現設計成本和性能的最優化。獨有的3D設計及分析環境，完美集成了Sigrity工具與Cadenceallegro®技術，較之於當前市場上依賴於第三方建模工具的產品，Sigrity™2018版本可提供效率更高、出錯率更低的解決方案，大幅度縮短設計週期的同時、降低設計失誤風險。此外，全新的3DWorkbench解決方案彌補了機械和電氣領域之間的隔閡，產品開發團隊自此能夠實現跨多板信號的快速精準分析。

x64|Languages:English| 
Description:
Sigritysoftwareforsimulationandsignalintegrityinhigh-frequencycircuits.Withtheadvancementofdigitalprocessingtechnology,theneedforfasterprocessinghasgrownincreasingly,Prdzashgrhayythatnecessarilyneedstoworkfastercircuitswithhigherprocessingspeedsandhigherfrequenciesarelocated.ByincreasingthespeedsignalsforaccuratespeedupthesignalsonroutesthataremountedonboardsPCBorboardslaminatedissuesandnewproblemsarisesinthecaseofField,grippedengineerswillbeeventssuchasinterference,distortionandnoiseandsignalintegrityathighfrequenciescausetobesubjecttothreats.

Tominimizethesethreats,compensatethemandincreasethequalityofhigh-speedcircuits,needsanalysisandcorrectiveactionsthatthesoftwareAllegroSigrityitisconvenientforus.Thesoftwarecombinestechnologywithdesign,editingandroutingICandPCBcoordinateCadence®Allegro®enablesadvancedanalysisofbothpre-layoutandpost-layoutprovidesforusers.

Thesoftwareisdesignedtoexaminevariousscenariosintheinitialphasesallowsaccuratedesignandredesignminimized.ThissoftwaresupportsreadingandwritingdirectlyonthePCBandICdesignofAllego'sdatabase.AccuratesimulatorbasedonSPICEaswellasbuilt-solverfor2dand3dextractstheuser.Thesoftwarealsomodelingthetransistor-levelinputandoutputfunctionsincludepower-awareIBIS5.0support.

FeaturesandApplicationsAllegroSigrity:
-PerformawiderangeofSIanalysisorSignalintegrity(signalintegrity)
-Earlydetectionofdesignerrorstoincreasesuccessintheearlyphases
-Restrictionscanbesetquicklyandaccuratelyapplythebasicprocesses
-Improveproductperformancethroughexplorationandspacesolutions
-Evaluationofalternativetopologiesininfancy
-ProductionofSparametersofthetopologyandsignalanalysisintheformofparameterS
-Tablesestimateinterferencedesignedtoincreaseproductivity
-WasapprovedafterPCBdesignandICdesigndirectlyonboards
-Multipleevaluationandconfirmationsignalsfordifferentpathsonsiliconboards

  

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